� ���8|( .D'amazon,omap3-echoti,omap3630ti,omap3 +7Amazon Echo (first generation)chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/mmc@4809c000Q/ocp@68000000/mmc@480b4000V/ocp@68000000/mmc@480ad000[/ocp@68000000/serial@4806a000c/ocp@68000000/serial@4806c000k/ocp@68000000/serial@49020000s/ocp@68000000/serial@49042000cpus+cpu@0arm,cortex-a8{cpu���cpu��������pmu@54000000arm,cortex-a8-pmu�T���debugsssocti,omap-inframpu ti,omap3-mpu�mpuiva ti,iva2.2�ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bus�h� +�l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus� +  pinmux@30 ti,omap3-padconfpinctrl-single�08+ *?]�pinmux_tps_pinsz�w��pinmux_button_pins(z���� ��pinmux_mmc1_pins0z��pinmux_mmc2_pinsPz(*,.02468:��pinmux_mcbsp2_pins z ��scm_conf@270sysconsimple-bus�p0+ p0�pbias_regulator@2b0ti,pbias-omap3ti,pbias-omap���pbias_mmc_omap2430�pbias_mmc_omap2430�w@�-����clocks+clock@68 ti,clksel�h�clock-mcbsp5-mux-fck�ti,composite-mux-clock�mcbsp5_mux_fck��� clock-mcbsp3-mux-fck�ti,composite-mux-clock�mcbsp3_mux_fck� �clock-mcbsp4-mux-fck�ti,composite-mux-clock�mcbsp4_mux_fck� ��mcbsp5_fck�ti,composite-clock� ��clock@4 ti,clksel��clock-mcbsp1-mux-fck�ti,composite-mux-clock�mcbsp1_mux_fck��� clock-mcbsp2-mux-fck�ti,composite-mux-clock�mcbsp2_mux_fck� ��mcbsp1_fck�ti,composite-clock� ��mcbsp2_fck�ti,composite-clock���mcbsp3_fck�ti,composite-clock���mcbsp4_fck�ti,composite-clock���clockdomainspinmux@a00 ti,omap3-padconfpinctrl-single� \+ *?]�target-module@480a6000ti,sysc-omap2ti,sysc�H `DH `HH `Lrevsyscsyss  &��ick+ H ` aes1@0 ti,omap3-aes�P�3  8txrxtarget-module@480c5000ti,sysc-omap2ti,sysc�H PDH PHH PLrevsyscsyss  &��ick+ H P aes2@0 ti,omap3-aes�P�3AB8txrxprm@48306000 ti,omap3-prm�H0`@� clocks+virt_16_8m_ck� fixed-clockBY�osc_sys_ck@d40� ti,mux-clock�� @�sys_ck@1270�ti,divider-clock��R�p]�"sys_clkout1@d70�ti,gate-clock�� p���dpll3_x2_ck�fixed-factor-clock�tdpll3_m2x2_ck�fixed-factor-clock�t�!dpll4_x2_ck�fixed-factor-clock� tcorex2_fck�fixed-factor-clock�!t�#wkup_l4_ick�fixed-factor-clock�"t�bcorex2_d3_fck�fixed-factor-clock�#t��corex2_d5_fck�fixed-factor-clock�#t��clockdomainscm@48004000 ti,omap3-cm�H@@clocks+dummy_apb_pclk� fixed-clockBomap_32k_fck� fixed-clockB��Hvirt_12m_ck� fixed-clockB��virt_13m_ck� fixed-clockB�]@�virt_19200000_ck� fixed-clockB$��virt_26000000_ck� fixed-clockB����virt_38_4m_ck� fixed-clockBI��dpll4_ck@d00�ti,omap3-dpll-per-j-type-clock�""� D 0� dpll4_m2_ck@d48�ti,divider-clock� R?� H]�$dpll4_m2x2_mul_ck�fixed-factor-clock�$t�%dpll4_m2x2_ck@d00�ti,hsdiv-gate-clock�%�� ��&omap_96m_alwon_fck�fixed-factor-clock�&t�2dpll3_ck@d00�ti,omap3-dpll-core-clock�""� @ 0�clock@1140 ti,clksel�@�clock-dpll3-m3�ti,divider-clock �dpll3_m3_ck��R]�,clock-dpll4-m6�ti,divider-clock �dpll4_m6_ck� �R?]�>clock-emu-src-mux� ti,mux-clock�emu_src_mux_ck�"'()�vclock-pclk-fck�ti,divider-clock �pclk_fck�*�R]clock-pclkx2-fck�ti,divider-clock �pclkx2_fck�*�R]clock-atclk-fck�ti,divider-clock �atclk_fck�*�R]clock-traceclk-src-fck� ti,mux-clock�traceclk_src_fck�"'()��+clock-traceclk-fck�ti,divider-clock �traceclk_fck�+� R]dpll3_m3x2_mul_ck�fixed-factor-clock�,t�-dpll3_m3x2_ck@d00�ti,hsdiv-gate-clock�-� � ��.emu_core_alwon_ck�fixed-factor-clock�.t�'sys_altclk� fixed-clockB�5mcbsp_clks� fixed-clockB�core_ck�fixed-factor-clock�t�/dpll1_fck@940�ti,divider-clock�/�R� @]�0dpll1_ck@904�ti,omap3-dpll-clock�"0�  $ @ 4�dpll1_x2_ck�fixed-factor-clock�t�1dpll1_x2m2_ck@944�ti,divider-clock�1R� D]�Ecm_96m_fck�fixed-factor-clock�2t�3clock@d40 ti,clksel� @�clock-dpll3-m2�ti,divider-clock �dpll3_m2_ck��R]�clock-omap-96m-fck� ti,mux-clock �omap_96m_fck�3"��Yclock-omap-54m-fck� ti,mux-clock �omap_54m_fck�45��Aclock-omap-48m-fck� ti,mux-clock �omap_48m_fck�65��9clock@e40 ti,clksel�@�clock-dpll4-m3�ti,divider-clock �dpll4_m3_ck� �R ]�7clock-dpll4-m4�ti,divider-clock �dpll4_m4_ck� R]�:dpll4_m3x2_mul_ck�fixed-factor-clock�7t�8dpll4_m3x2_ck@d00�ti,hsdiv-gate-clock�8�� ��4cm_96m_d2_fck�fixed-factor-clock�3t�6omap_12m_fck�fixed-factor-clock�9t�Zdpll4_m4x2_mul_ck�ti,fixed-factor-clock�:����;dpll4_m4x2_ck@d00�ti,gate-clock�;�� ���^dpll4_m5_ck@f40�ti,divider-clock� R?�@]�<dpll4_m5x2_mul_ck�ti,fixed-factor-clock�<����=dpll4_m5x2_ck@d00�ti,hsdiv-gate-clock�=�� ���zdpll4_m6x2_mul_ck�fixed-factor-clock�>t�?dpll4_m6x2_ck@d00�ti,hsdiv-gate-clock�?�� ��@emu_per_alwon_ck�fixed-factor-clock�@t�(clock@d70 ti,clksel� p�clock-clkout2-src-gate� ti,composite-no-wait-gate-clock�clkout2_src_gate_ck�/��Cclock-clkout2-src-mux�ti,composite-mux-clock�clkout2_src_mux_ck�/"3A�Dclock-sys-clkout2�ti,divider-clock �sys_clkout2�B�R@�clkout2_src_ck�ti,composite-clock�CD�Bmpu_ck�fixed-factor-clock�Et�Farm_fck@924�ti,divider-clock�F� $Remu_mpu_alwon_ck�fixed-factor-clock�Ft�)clock@a40 ti,clksel� @�clock-l3-ick�ti,divider-clock�l3_ick�/R]�Gclock-l4-ick�ti,divider-clock�l4_ick�G�R]�Iclock-gpt10-mux-fck�ti,composite-mux-clock�gpt10_mux_fck�H"��Vclock-gpt11-mux-fck�ti,composite-mux-clock�gpt11_mux_fck�H"��Xclock-ssi-ssr-div-fck-3430es2�ti,composite-divider-clock�ssi_ssr_div_fck_3430es2�#�$��clock@c40 ti,clksel� @�clock-rm-ick�ti,divider-clock�rm_ick�I�R]clock-gpt1-mux-fck�ti,composite-mux-clock �gpt1_mux_fck�H"�aclock-usim-mux-fck�ti,composite-mux-clock �usim_mux_fck(�"JKLMNOPQR�]��clock@a00 ti,clksel� �clock-gpt10-gate-fck�ti,composite-gate-clock�gpt10_gate_fck�"� �Uclock-gpt11-gate-fck�ti,composite-gate-clock�gpt11_gate_fck�"� �Wclock-mmchs2-fck�ti,wait-gate-clock �mmchs2_fck����clock-mmchs1-fck�ti,wait-gate-clock �mmchs1_fck����clock-i2c3-fck�ti,wait-gate-clock �i2c3_fck����clock-i2c2-fck�ti,wait-gate-clock �i2c2_fck����clock-i2c1-fck�ti,wait-gate-clock �i2c1_fck����clock-mcbsp5-gate-fck�ti,composite-gate-clock�mcbsp5_gate_fck�� � clock-mcbsp1-gate-fck�ti,composite-gate-clock�mcbsp1_gate_fck�� � clock-mcspi4-fck�ti,wait-gate-clock �mcspi4_fck�S���clock-mcspi3-fck�ti,wait-gate-clock �mcspi3_fck�S���clock-mcspi2-fck�ti,wait-gate-clock �mcspi2_fck�S���clock-mcspi1-fck�ti,wait-gate-clock �mcspi1_fck�S���clock-uart2-fck�ti,wait-gate-clock �uart2_fck�S���clock-uart1-fck�ti,wait-gate-clock �uart1_fck�S� ��clock-hdq-fck�ti,wait-gate-clock�hdq_fck�T���clock-modem-fck�ti,omap3-interface-clock �modem_fck�"���clock-mspro-fck�ti,wait-gate-clock �mspro_fck��clock-ssi-ssr-gate-fck-3430es2� ti,composite-no-wait-gate-clock�ssi_ssr_gate_fck_3430es2�#��~clock-mmchs3-fck�ti,wait-gate-clock �mmchs3_fck����gpt10_fck�ti,composite-clock�UVgpt11_fck�ti,composite-clock�WXcore_96m_fck�fixed-factor-clock�Yt�core_48m_fck�fixed-factor-clock�9t�Score_12m_fck�fixed-factor-clock�Zt�Tcore_l3_ick�fixed-factor-clock�Gt�[clock@a10 ti,clksel� �clock-sdrc-ick�ti,wait-gate-clock �sdrc_ick�[���clock-mmchs2-ick�ti,omap3-interface-clock �mmchs2_ick�\���clock-mmchs1-ick�ti,omap3-interface-clock �mmchs1_ick�\���clock-hdq-ick�ti,omap3-interface-clock�hdq_ick�\���clock-mcspi4-ick�ti,omap3-interface-clock �mcspi4_ick�\���clock-mcspi3-ick�ti,omap3-interface-clock �mcspi3_ick�\���clock-mcspi2-ick�ti,omap3-interface-clock �mcspi2_ick�\���clock-mcspi1-ick�ti,omap3-interface-clock �mcspi1_ick�\���clock-i2c3-ick�ti,omap3-interface-clock �i2c3_ick�\���clock-i2c2-ick�ti,omap3-interface-clock �i2c2_ick�\���clock-i2c1-ick�ti,omap3-interface-clock �i2c1_ick�\���clock-uart2-ick�ti,omap3-interface-clock �uart2_ick�\���clock-uart1-ick�ti,omap3-interface-clock �uart1_ick�\� ��clock-gpt11-ick�ti,omap3-interface-clock �gpt11_ick�\� ��clock-gpt10-ick�ti,omap3-interface-clock �gpt10_ick�\� ��clock-mcbsp5-ick�ti,omap3-interface-clock �mcbsp5_ick�\� ��clock-mcbsp1-ick�ti,omap3-interface-clock �mcbsp1_ick�\� ��clock-omapctrl-ick�ti,omap3-interface-clock �omapctrl_ick�\���clock-aes2-ick�ti,omap3-interface-clock �aes2_ick�\��clock-sha12-ick�ti,omap3-interface-clock �sha12_ick�\���clock-icr-ick�ti,omap3-interface-clock�icr_ick�\�clock-des2-ick�ti,omap3-interface-clock �des2_ick�\�clock-mspro-ick�ti,omap3-interface-clock �mspro_ick�\�clock-mailboxes-ick�ti,omap3-interface-clock�mailboxes_ick�\�clock-sad2d-ick�ti,omap3-interface-clock �sad2d_ick�G���clock-hsotgusb-ick-3430es2�"ti,omap3-hsotgusb-interface-clock�hsotgusb_ick_3430es2�[���clock-ssi-ick-3430es2�ti,omap3-ssi-interface-clock�ssi_ick_3430es2�]���clock-mmchs3-ick�ti,omap3-interface-clock �mmchs3_ick�\���gpmc_fck�fixed-factor-clock�[tcore_l4_ick�fixed-factor-clock�It�\clock@e00 ti,clksel��clock-dss-tv-fck�ti,gate-clock �dss_tv_fck�A���clock-dss-96m-fck�ti,gate-clock �dss_96m_fck�Y���clock-dss2-alwon-fck�ti,gate-clock�dss2_alwon_fck�"���clock-dss1-alwon-fck-3430es2�ti,dss-gate-clock�dss1_alwon_fck_3430es2�^����dummy_ck� fixed-clockBclock@c00 ti,clksel� �clock-gpt1-gate-fck�ti,composite-gate-clock�gpt1_gate_fck�"��`clock-gpio1-dbck�ti,gate-clock �gpio1_dbck�_���clock-wdt2-fck�ti,wait-gate-clock �wdt2_fck�_���clock-sr1-fck�ti,wait-gate-clock�sr1_fck�"��clock-sr2-fck�ti,wait-gate-clock�sr2_fck�"��clock-usim-gate-fck�ti,composite-gate-clock�usim_gate_fck�Y� ��gpt1_fck�ti,composite-clock�`a��wkup_32k_fck�fixed-factor-clock�Ht�_clock@c10 ti,clksel� �clock-wdt2-ick�ti,omap3-interface-clock �wdt2_ick�b���clock-wdt1-ick�ti,omap3-interface-clock �wdt1_ick�b���clock-gpio1-ick�ti,omap3-interface-clock �gpio1_ick�b���clock-omap-32ksync-ick�ti,omap3-interface-clock�omap_32ksync_ick�b���clock-gpt12-ick�ti,omap3-interface-clock �gpt12_ick�b���clock-gpt1-ick�ti,omap3-interface-clock �gpt1_ick�b���clock-usim-ick�ti,omap3-interface-clock �usim_ick�b� ��per_96m_fck�fixed-factor-clock�2t� per_48m_fck�fixed-factor-clock�9t�cclock@1000 ti,clksel��clock-uart3-fck�ti,wait-gate-clock �uart3_fck�c� ��clock-gpt2-gate-fck�ti,composite-gate-clock�gpt2_gate_fck�"��eclock-gpt3-gate-fck�ti,composite-gate-clock�gpt3_gate_fck�"��gclock-gpt4-gate-fck�ti,composite-gate-clock�gpt4_gate_fck�"��iclock-gpt5-gate-fck�ti,composite-gate-clock�gpt5_gate_fck�"��kclock-gpt6-gate-fck�ti,composite-gate-clock�gpt6_gate_fck�"��mclock-gpt7-gate-fck�ti,composite-gate-clock�gpt7_gate_fck�"��oclock-gpt8-gate-fck�ti,composite-gate-clock�gpt8_gate_fck�"� �qclock-gpt9-gate-fck�ti,composite-gate-clock�gpt9_gate_fck�"� �sclock-gpio6-dbck�ti,gate-clock �gpio6_dbck�d���clock-gpio5-dbck�ti,gate-clock �gpio5_dbck�d���clock-gpio4-dbck�ti,gate-clock �gpio4_dbck�d���clock-gpio3-dbck�ti,gate-clock �gpio3_dbck�d���clock-gpio2-dbck�ti,gate-clock �gpio2_dbck�d� ��clock-wdt3-fck�ti,wait-gate-clock �wdt3_fck�d� ��clock-mcbsp2-gate-fck�ti,composite-gate-clock�mcbsp2_gate_fck���clock-mcbsp3-gate-fck�ti,composite-gate-clock�mcbsp3_gate_fck���clock-mcbsp4-gate-fck�ti,composite-gate-clock�mcbsp4_gate_fck���clock-uart4-fck�ti,wait-gate-clock �uart4_fck�c���clock@1040 ti,clksel�@�clock-gpt2-mux-fck�ti,composite-mux-clock �gpt2_mux_fck�H"�fclock-gpt3-mux-fck�ti,composite-mux-clock �gpt3_mux_fck�H"��hclock-gpt4-mux-fck�ti,composite-mux-clock �gpt4_mux_fck�H"��jclock-gpt5-mux-fck�ti,composite-mux-clock �gpt5_mux_fck�H"��lclock-gpt6-mux-fck�ti,composite-mux-clock �gpt6_mux_fck�H"��nclock-gpt7-mux-fck�ti,composite-mux-clock �gpt7_mux_fck�H"��pclock-gpt8-mux-fck�ti,composite-mux-clock �gpt8_mux_fck�H"��rclock-gpt9-mux-fck�ti,composite-mux-clock �gpt9_mux_fck�H"��tgpt2_fck�ti,composite-clock�ef��gpt3_fck�ti,composite-clock�ghgpt4_fck�ti,composite-clock�ijgpt5_fck�ti,composite-clock�klgpt6_fck�ti,composite-clock�mngpt7_fck�ti,composite-clock�opgpt8_fck�ti,composite-clock�qrgpt9_fck�ti,composite-clock�stper_32k_alwon_fck�fixed-factor-clock�Ht�dper_l4_ick�fixed-factor-clock�It�uclock@1010 ti,clksel��clock-gpio6-ick�ti,omap3-interface-clock �gpio6_ick�u���clock-gpio5-ick�ti,omap3-interface-clock �gpio5_ick�u���clock-gpio4-ick�ti,omap3-interface-clock �gpio4_ick�u���clock-gpio3-ick�ti,omap3-interface-clock �gpio3_ick�u���clock-gpio2-ick�ti,omap3-interface-clock �gpio2_ick�u� ��clock-wdt3-ick�ti,omap3-interface-clock �wdt3_ick�u� ��clock-uart3-ick�ti,omap3-interface-clock �uart3_ick�u� ��clock-uart4-ick�ti,omap3-interface-clock �uart4_ick�u���clock-gpt9-ick�ti,omap3-interface-clock �gpt9_ick�u� ��clock-gpt8-ick�ti,omap3-interface-clock �gpt8_ick�u� ��clock-gpt7-ick�ti,omap3-interface-clock �gpt7_ick�u���clock-gpt6-ick�ti,omap3-interface-clock �gpt6_ick�u���clock-gpt5-ick�ti,omap3-interface-clock �gpt5_ick�u���clock-gpt4-ick�ti,omap3-interface-clock �gpt4_ick�u���clock-gpt3-ick�ti,omap3-interface-clock �gpt3_ick�u���clock-gpt2-ick�ti,omap3-interface-clock �gpt2_ick�u���clock-mcbsp2-ick�ti,omap3-interface-clock �mcbsp2_ick�u���clock-mcbsp3-ick�ti,omap3-interface-clock �mcbsp3_ick�u���clock-mcbsp4-ick�ti,omap3-interface-clock �mcbsp4_ick�u���emu_src_ck�ti,clkdm-gate-clock�v�*secure_32k_fck� fixed-clockB��wgpt12_fck�fixed-factor-clock�wt��wdt1_fck�fixed-factor-clock�wtsecurity_l4_ick2�fixed-factor-clock�It�xclock@a14 ti,clksel� �clock-aes1-ick�ti,omap3-interface-clock �aes1_ick�x��clock-rng-ick�ti,omap3-interface-clock�rng_ick�x���clock-sha11-ick�ti,omap3-interface-clock �sha11_ick�x�clock-des1-ick�ti,omap3-interface-clock �des1_ick�x�clock-pka-ick�ti,omap3-interface-clock�pka_ick�y�clock@f00 ti,clksel��clock-cam-mclk�ti,gate-clock �cam_mclk�z��clock-csi2-96m-fck�ti,gate-clock �csi2_96m_fck����cam_ick@f10�!ti,omap3-no-wait-interface-clock�I����security_l3_ick�fixed-factor-clock�Gt�yssi_l4_ick�fixed-factor-clock�It�]sr_l4_ick�fixed-factor-clock�Itdpll2_fck@40�ti,divider-clock�/�R�@]�{dpll2_ck@4�ti,omap3-dpll-clock�"{�$@4� �|dpll2_m2_ck@44�ti,divider-clock�|R�D]�}iva2_ck@0�ti,wait-gate-clock�}����clock@a18 ti,clksel� �clock-mad2d-ick�ti,omap3-interface-clock �mad2d_ick�G���clock-usbtll-ick�ti,omap3-interface-clock �usbtll_ick�\���ssi_ssr_fck_3430es2�ti,composite-clock�~��ssi_sst_fck_3430es2�fixed-factor-clock��t��sys_d2_ck�fixed-factor-clock�"t�Jomap_96m_d2_fck�fixed-factor-clock�Yt�Komap_96m_d4_fck�fixed-factor-clock�Yt�Lomap_96m_d8_fck�fixed-factor-clock�Yt�Momap_96m_d10_fck�fixed-factor-clock�Yt �Ndpll5_m2_d4_ck�fixed-factor-clock��t�Odpll5_m2_d8_ck�fixed-factor-clock��t�Pdpll5_m2_d16_ck�fixed-factor-clock��t�Qdpll5_m2_d20_ck�fixed-factor-clock��t�Rusim_fck�ti,composite-clock���dpll5_ck@d04�ti,omap3-dpll-clock�""�  $ L 4���dpll5_m2_ck@d50�ti,divider-clock��R� P]��sgx_gate_fck@b00�ti,composite-gate-clock�/�� ��core_d3_ck�fixed-factor-clock�/t��core_d4_ck�fixed-factor-clock�/t��core_d6_ck�fixed-factor-clock�/t��omap_192m_alwon_fck�fixed-factor-clock�&t��core_d2_ck�fixed-factor-clock�/t��sgx_mux_fck@b40�ti,composite-mux-clock ����3����� @��sgx_fck�ti,composite-clock����sgx_ick@b10�ti,wait-gate-clock�G� ���cpefuse_fck@a08�ti,gate-clock�"� ���ts_fck@a08�ti,gate-clock�H� ���usbtll_fck@a08�ti,wait-gate-clock��� ���dss_ick_3430es2@e10�ti,omap3-dss-interface-clock�I����usbhost_120m_fck@1400�ti,gate-clock������usbhost_48m_fck@1400�ti,dss-gate-clock�9����usbhost_ick@1410�ti,omap3-dss-interface-clock�I����clockdomainscore_l3_clkdmti,clockdomain���dpll3_clkdmti,clockdomain�dpll1_clkdmti,clockdomain�per_clkdmti,clockdomainl����������������������������emu_clkdmti,clockdomain�*dpll4_clkdmti,clockdomain� wkup_clkdmti,clockdomain$����������dss_clkdmti,clockdomain������core_l4_clkdmti,clockdomain��������������������������������������cam_clkdmti,clockdomain���iva2_clkdmti,clockdomain��dpll2_clkdmti,clockdomain�|d2d_clkdmti,clockdomain ����dpll5_clkdmti,clockdomain��sgx_clkdmti,clockdomain��usbhost_clkdmti,clockdomain ����target-module@48320000ti,sysc-omap2ti,sysc�H2H2 revsysc�_��fckick+ H2counter@0ti,omap-counter32k� interrupt-controller@48200000ti,omap3-intc*�H �target-module@48056000ti,sysc-omap2ti,sysc�H`H`,H`(revsyscsyss #  &�[�ick+ H`dma-controller@0ti,omap3630-sdmati,omap-sdma�� +6 C`�gpio@48310000ti,omap3-gpio�H1��gpio1Pbr*�gpio@49050000ti,omap3-gpio�I��gpio2br*gpio@49052000ti,omap3-gpio�I ��gpio3br*��gpio@49054000ti,omap3-gpio�I@� �gpio4br*��gpio@49056000ti,omap3-gpio�I`�!�gpio5br*� gpio@49058000ti,omap3-gpio�I��"�gpio6br*serial@4806a000ti,omap3-uart�H� ~H3128txrx�uart1B�lserial@4806c000ti,omap3-uart�H�~I3348txrx�uart2B�lserial@49020000ti,omap3-uart�I~J3568txrx�uart3B�li2c@48070000 ti,omap3-i2c�H��8+�i2c1B�tps@2d�- ti,tps65910�default��� �������������*�regulators+regulator@0�7vrtcregulator@1�7vio�w@�w@Lregulator@2�7vdd1�vdd_mpu� '���``L�regulator@3�7vdd2�vdd_dsp� '���`Lregulator@4�7vdd3 �vdd_core�LK@�LK@Lregulator@5�7vdig1�O��)2�Lregulator@6�7vdig2�B@�w@Lregulator@7�7vpll�B@�&%�Lregulator@8�7vdac����2Z�Lregulator@9� 7vaux1�w@�+|�Lregulator@10� 7vaux2�w@�2Z�Lregulator@11� 7vaux33�w@�2Z�Lregulator@12� 7vmmc�w@�-��L��regulator@13� 7vbbi2c@48072000 ti,omap3-i2c�H ��9+�i2c2B�lp5523A@32+national,lp5523rq1�2x �� multi-led@0+�� led@0� ���led@1� ���led@6� ���multi-led@1+�� led@2� ���led@3� ���led@7� ���multi-led@2+�� led@4� ���led@5� ���led@8� ���lp5523B@33+national,lp5523rq3�3xmulti-led@0+�� led@0� ���led@1� ���led@6� ���multi-led@1+�� led@2� ���led@3� ���led@7� ���multi-led@2+�� led@4� ���led@5� ���led@8� ���lp5523C@34+national,lp5523rq4�4xmulti-led@0+�� led@0� ���led@1� ���led@6� ���multi-led@1+�� led@2� ���led@3� ���led@7� ���multi-led@2+�� led@4� ���led@5� ���led@8� ���lp552D@35+national,lp5523rq2�5xmulti-led@0+�� led@0� ���led@1� ���led@6� ���multi-led@1+�� led@2� ���led@3� ���led@7� ���multi-led@2+�� led@4� ���led@5� ���led@8� ���i2c@48060000 ti,omap3-i2c�H��=+�i2c3B�codec@18�ti,tlv320aic32x4����mclk���� �� � mailbox@48094000ti,omap3-mailbox�mailbox�H @����mbox-dsp   spi@48098000ti,omap2-mcspi�H ��A+�mcspi1 @3#$%&'()* 8tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspi�H ��B+�mcspi2  3+,-.8tx0rx0tx1rx1spi@480b8000ti,omap2-mcspi�H ��[+�mcspi3  38tx0rx0tx1rx1spi@480ba000ti,omap2-mcspi�H ��0+�mcspi4 3FG8tx0rx01w@480b2000 ti,omap3-1w�H �:�hdq1wmmc@4809c000ti,omap3-hsmmc�H ��S�mmc1.3=>8txrx;�HokayO�default��Y�mmc@480b4000ti,omap3-hsmmc�H @�V�mmc23/08txrxHokayO�default��Y�mmc@480ad000ti,omap3-hsmmc�H ��^�mmc33MN8txrx+HokayO�default��es~�Y���atheros@0atheros,ath6kl�Ommu@480bd400�ti,omap2-iommu�H ����mmu_isp��mmu@5d000000�ti,omap2-iommu�]���mmu_iva Hdisabledwdt@48314000 ti,omap3-wdt�H1@� �wd_timer2mcbsp@48074000ti,omap3-mcbsp�H@�mpu �;< �commontxrx���mcbsp13 8txrx���fck Hdisabledtarget-module@480a0000ti,sysc-omap2ti,sysc�H <H @H Drevsyscsyss &���ick+ H rng@0 ti,omap2-rng� �4mcbsp@49022000ti,omap3-mcbsp�I �I�� mpusidetone�>?�commontxrxsidetone��mcbsp2mcbsp2_sidetone3!"8txrx����fckickHokay��default��� mcbsp@49024000ti,omap3-mcbsp�I@�I�� mpusidetone�YZ�commontxrxsidetone���mcbsp3mcbsp3_sidetone38txrx����fckick Hdisabledmcbsp@49026000ti,omap3-mcbsp�I`�mpu �67 �commontxrx���mcbsp438txrx���fck� Hdisabledmcbsp@48096000ti,omap3-mcbsp�H `�mpu �QR �commontxrx���mcbsp538txrx���fck Hdisabledsham@480c3000ti,omap3-sham�sham�H 0d�13E8rxtarget-module@48318000ti,sysc-omap2-timerti,sysc�H1�H1�H1�revsyscsyss ' &����fckick+ H1���timer@0ti,omap3430-timer�����fck�%��Htarget-module@49032000ti,sysc-omap2-timerti,sysc�I I I revsyscsyss ' &����fckick+ I timer@0ti,omap3430-timer��&timer@49034000ti,omap3430-timer�I@�'�timer3timer@49036000ti,omap3430-timer�I`�(�timer4timer@49038000ti,omap3430-timer�I��)�timer5'timer@4903a000ti,omap3430-timer�I��*�timer6'timer@4903c000ti,omap3430-timer�I��+�timer7'timer@4903e000ti,omap3430-timer�I��,�timer84'timer@49040000ti,omap3430-timer�I�-�timer94timer@48086000ti,omap3430-timer�H`�.�timer104timer@48088000ti,omap3430-timer�H��/�timer114target-module@48304000ti,sysc-omap2-timerti,sysc�H0@H0@H0@revsyscsyss ' &����fckick+ H0@timer@0ti,omap3430-timer��_�Ausbhstll@48062000 ti,usbhs-tll�H �N �usb_tll_hsusbhshost@48064000ti,usbhs-host�H@ �usb_host_hs+ohci@48064400ti,ohci-omap3�HD�LQehci@48064800 ti,ehci-omap�HH�Mgpmc@6e000000ti,omap3430-gpmc�gpmc�n��38rxtxiu+*brusb_otg_hs@480ab000ti,omap3-musb�H ��\]�mcdma �usb_otg_hs��� dss@48050000 ti,omap3-dss�H Hdisabled �dss_core���fck+dispc@48050400ti,omap3-dispc�H� �dss_dispc���fckencoder@4804fc00 ti,omap3-dsi�H�H�@H� protophypll� Hdisabled �dss_dsi1��� �fcksys_clk+encoder@48050800ti,omap3-rfbi�H Hdisabled �dss_rfbi����fckickencoder@48050c00ti,omap3-venc�H  Hdisabled �dss_venc����fcktv_dac_clkssi-controller@48058000 ti,omap3-ssi�ssiHokay�H�H�sysgdd�G�gdd_mpu+ ���� �ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-port�H�H�txrx�CDssi-port@4805b000ti,omap3-ssi-port�H�H�txrx�EFserial@49042000ti,omap3-uart�I �P3QR8txrx�uart4B�lregulator-abb-mpu ti,abb-v1 �abb_mpu_iva+�H0r�H0hbase-addressint-address��"��`�sO�7���pinmux@480025a0 ti,omap3-padconfpinctrl-single�H%�\+ *?]�pinmux_mmc3_pins0z8:BDFH��isp@480bc000 ti,omap3-isp�H ��H �������ports+bandgap@48002524�H%$ti,omap36xx-bandgap��target-module@480cb000ti,sysc-omap3630-srti,sysc�smartreflex_core�H �8sysc  ��fck+ H �smartreflex@0ti,omap3-smartreflex-core��target-module@480c9000ti,sysc-omap3630-srti,sysc�smartreflex_mpu_iva�H �8sysc  ��fck+ H �smartreflex@480c9000ti,omap3-smartreflex-mpu-iva��target-module@50000000ti,sysc-omap4ti,sysc�P�P� revsysc  ���fckick+ P Hdisabledopp-tableoperating-points-v2-ti-cpu��opp50-300000000�ssssss'����8opp100-600000000#�FO�O�O�O�O�O�'����opp130-800000000/�7�7�7�7�7�7�'����opp1g-1000000000;��������'����opp_supplyti,omap-opp-supplyD�thermal-zonescpu-thermal_�u��N �tripscpu_alert�8����passive�cpu_crit�_��� �criticalcooling-mapsmap0� ���������memory@80000000{memory�� `fixedregulator0regulator-fixed�vcc5v�LK@�LK@`L��fixedregulator1regulator-fixed�vcc3v3�2Z��2Z�`L��fixedregulator2regulator-fixed�vcc1v8�w@�w@`L��sdio-pwrseqmmc-pwrseq-simple ��(��gpio-keys gpio-keys�default�mute-buttonrmute�q ���help-buttonrhelp�� ���rotary-encoderrotary-encoder��� �speaker-amplifiersimple-audio-amplifier #  0Speaker AmpB�� soundsimple-audio-cardMMisto SpeakerdSpeakerSpeakerZ~Speaker Amp INLHPLSpeaker Amp INRHPRSpeakerSpeaker Amp OUTLSpeakerSpeaker Amp OUTR�i2s� � � simple-audio-card,cpu  simple-audio-card,codec   $��  compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2mmc0mmc1mmc2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supply#cooling-cellscpu0-supplyphandleinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclock-output-namesti,bit-shiftreg-namesti,sysc-maskti,sysc-sidleti,syss-maskdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,dividersti,low-power-stopti,lockti,low-power-bypassti,sysc-midle#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0ti,en-ck32k-xtalti,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvccio-supplyregulator-compatibleregulator-always-onregulator-boot-onlabelclock-modeenable-gpiocolorled-curmax-cur#sound-dai-cellsldoin-supplyiov-supplyreset-gpios#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplystatusbus-widthvmmc-supplynon-removabledisable-wpmmc-pwrseqvqmmc-supply#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-sizeti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureremote-wakeup-connectedgpmc,num-csgpmc,num-waitpinsmultipointnum-epsram-bitsti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorstemperaturehysteresistripcooling-devicepost-power-on-delay-mslinux,codewakeup-sourcelinux,axisrotary-encoder,relative-axisenable-gpiossound-name-prefixVCC-supplysimple-audio-card,namesimple-audio-card,widgetssimple-audio-card,routingsimple-audio-card,formatsimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,aux-devssound-daisystem-clock-frequency