� ��M�8Gx(�G@ elgin,rv1108-r1rockchip,rv1108&7Elgin RV1108 R1 boardaliases=/i2c@20000000B/i2c@10240000G/i2c@10250000L/i2c@10260000Q/serial@10230000Y/serial@10220000a/serial@10210000i/mmc@30110000cpuscpu@f00ncpuarm,cortex-a7z~�@���K���opp-table-0operating-points-v2�opp-408000000�Q������@opp-600000000�#�F�����@opp-816000000�0�,�����@opp-1008000000�<���0��@arm-pmuarm,cortex-a7-pmu  Ltimerarm,armv7-timer  8n6oscillator fixed-clock8n6Hxin24m[�sram@10080000 mmio-sramz  h serial@10210000&rockchip,rv1108-uartsnps,dw-apb-uartz!  .oy8n6�J �baudclkapb_pclk��default��okayserial@10220000&rockchip,rv1108-uartsnps,dw-apb-uartz"  -oy8n6�I �baudclkapb_pclk��default� �disabledserial@10230000&rockchip,rv1108-uartsnps,dw-apb-uartz#  ,oy8n6�H �baudclkapb_pclk��default��okayi2c@10240000rockchip,rv1108-i2cz$  �v �i2cpclk�default� �  �disabledi2c@10250000rockchip,rv1108-i2cz%  �w �i2cpclk�default� �  �disabledi2c@10260000rockchip,rv1108-i2cz&  !�x �i2cpclk�default� �  �disabledspi@10270000rockchip,rv1108-spiz'  %�l�spiclkapb_pclk� �txrx�okay�default� dac@0rohm,dh2228fvz�n6��pwm@10280000(rockchip,rv1108-pwmrockchip,rk3288-pwmz(  &�y  �pwmpclk�default�� �disabledpwm@10280010(rockchip,rv1108-pwmrockchip,rk3288-pwmz(  &�y  �pwmpclk�default�� �disabledpwm@10280020(rockchip,rv1108-pwmrockchip,rk3288-pwmz(   &�y  �pwmpclk�default�� �disabledpwm@10280030(rockchip,rv1108-pwmrockchip,rk3288-pwmz(0  &�y  �pwmpclk�default�� �disableddma-controller@102a0000arm,pl330arm,primecellz*@  �"�� �apb_pclk�syscon@10300000&rockchip,rv1108-grfsysconsimple-mfdz0� io-domains"rockchip,rv1108-io-voltage-domain �disabledusb2phy@100rockchip,rv1108-usb2phyz �{�phyclk[Husbphy9�okay�+otg-port  0Iotg-muxY�okay�-host-port  3 IlinestateY�okay�,timer@10350000,rockchip,rv1108-timerrockchip,rk3288-timerz5   # � �pclktimerwatchdog@10360000 rockchip,rv1108-wdtsnps,dw-wdtz6  "� �disabledthermal-zonessoc-thermaldz��2�tripstrip-point0�p��upassivetrip-point1�L��upassive�soc-crit�s�� ucriticalcooling-mapsmap0� ����������tsadc@10370000rockchip,rv1108-tsadcz7  /�n� q��n �tsadcapb_pclk�initdefaultsleep�H "tsadc-apb.��E �disabled�adc@1038c000.rockchip,rv1108-saradcrockchip,rk3399-saradcz8�  [�m�saradcapb_pclk �disabledi2c@20000000rockchip,rv1108-i2cz   �[ �i2cpclk�default�� �okay8�m�pmic@18rockchip,rk805z& �[������regulatorsDCDC_REG1 vdd_core �`,�`DX�regulator-state-memj� ��DCDC_REG2 vdd_buck2!��,!��DX�regulator-state-mem�DCDC_REG3vcc_ddrDXregulator-state-memjDCDC_REG4vcc_io2Z�,2Z�DXregulator-state-memj�2Z�LDO_REG1vdd_10B@,B@DXregulator-state-mem�LDO_REG2vcc_18w@,w@DXregulator-state-mem�LDO_REG3 vdd10_pmuB@,B@DXregulator-state-memj�B@pwm@20040000(rockchip,rv1108-pwmrockchip,rk3288-pwmz   '�Z �pwmpclk�default� � �disabledpwm@20040010(rockchip,rv1108-pwmrockchip,rk3288-pwmz   '�Z �pwmpclk�default�!� �disabledpwm@20040020(rockchip,rv1108-pwmrockchip,rk3288-pwmz    '�Z �pwmpclk�default�"� �disabledpwm@20040030(rockchip,rv1108-pwmrockchip,rk3288-pwmz 0  '�Z �pwmpclk�default�#� �disabledsyscon@20060000)rockchip,rv1108-pmugrfsysconsimple-mfdz �3io-domains&rockchip,rv1108-pmu-io-voltage-domain �disabledsyscon@202a0000rockchip,rv1108-usbgrfsysconz *�clock-controller@20200000rockchip,rv1108-cruz ��xin24m� [��nand-controller@30100000rockchip,rv1108-nfcz0  �CC�ahbnfc�C��р �disabledmmc@301100000rockchip,rv1108-dw-mshcrockchip,rk3288-dw-mshcz0@   �FGSV�biuciuciu-driveciu-sample���р�okay������default �$%&mmc@301200000rockchip,rv1108-dw-mshcrockchip,rk3288-dw-mshcz0@   �EERU�biuciuciu-driveciu-sample���р �disabledmmc@301300000rockchip,rv1108-dw-mshcrockchip,rk3288-dw-mshcz0@   �DDQT�biuciuciu-driveciu-sample�����default�'()* �disabledusb@30140000 generic-ehciz0   �S+#,(usb�okayusb@30160000 generic-ohciz0   �S+#,(usb�okayusb@301800002rockchip,rv1108-usbrockchip,rk3066-usbsnps,dwc2z0  �T�otg2otg:L[��@ #- (usb2-phy�okayspi@301c0000 rockchip,sfcz0@  8�PH�clk_sfchclk_sfc �./0�default �disabledethernet@30200000rockchip,rv1108-gmacz0  Imacirqeth_wake_irq8�pqqrs�M�stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macjrmii�default�1� �okaysoutput �2�interrupt-controller@32010000 arm,gic-400�� z22 2@ 2`    �pinctrlrockchip,rv1108-pinctrl� �3hgpio@20030000rockchip,gpio-bankz   (������gpio@10310000rockchip,gpio-bankz1  )������2gpio@10320000rockchip,gpio-bankz2  *�����gpio@10330000rockchip,gpio-bankz3  +�����pcfg-pull-up��9pcfg-pull-downpcfg-pull-none�6pcfg-pull-none-drv-8ma�5pcfg-pull-none-drv-12ma �7pcfg-pull-none-smt-�8pcfg-pull-up-drv-8ma��4pcfg-pull-none-drv-4ma�:pcfg-pull-up-drv-4ma��;pcfg-output-highBpcfg-output-lowNpcfg-input-high�Yemmcemmc-bus8�f44444444�&emmc-clkf5�$emmc-cmdf 4�%sfcsfc-bus4@f6666�0sfc-bus2 f66sfc-cs0f 6�/sfc-clkf6�.gmacrmii-pins�f666 7 7 7 6666�1i2c0i2c0-xfer f 8 8�i2c1i2c1-xfer f99� i2c2m1i2c2m1-xfer f66� i2c2m1-pins f66i2c2m05vi2c2m05v-xfer f66i2c2m05v-pins f66i2c3i2c3-xfer f66� pwm0pwm0-pinf6� pwm1pwm1-pinf6�!pwm2pwm2-pinf6�"pwm3pwm3-pinf6�#pwm4pwm4-pinf6�pwm5pwm5-pinf6�pwm6pwm6-pinf6�pwm7pwm7-pinf 6�sdmmcsdmmc-clkf:�'sdmmc-cmdf;�(sdmmc-cdf;�)sdmmc-bus1f;sdmmc-bus4@f;;;;�*spim0spim0-clkf9spim0-cs0f9spim0-txf9spim0-rxf9spim1spim1-clkf9� spim1-cs0f9�spim1-rxf9�spim1-txf9�tsadcotp-outf6�otp-pinf6�uart0uart0-xfer f96�uart0-ctsf6uart0-rtsf6uart0-rts-pinf6uart1uart1-xfer f96�uart1-ctsf6uart1-rtsf6uart2m0uart2m0-xfer f96�uart2m1uart2m1-xfer f96uart2_5vuart2_5v-ctsf6uart2_5v-rtsf6memory@60000000nmemoryz`chosentserial2:1500000n8vsys-regulatorregulator-fixedvsysLK@,LK@X� #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3serial0serial1serial2mmc0device_typeregclock-latencyclocks#cooling-cellsdynamic-power-coefficientoperating-points-v2cpu-supplyphandleopp-hzopp-microvoltclock-latency-nsinterruptsarm,cpu-registers-not-fw-configuredclock-frequencyclock-output-names#clock-cellsrangesreg-shiftreg-io-widthclock-namesdmaspinctrl-namespinctrl-0statusrockchip,grfdma-namesspi-max-frequencyspi-cphaspi-cpol#pwm-cells#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstrockchip,usbgrfinterrupt-names#phy-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontributionassigned-clocksassigned-clock-ratespinctrl-1pinctrl-2resetsreset-namesrockchip,hw-tshut-temp#thermal-sensor-cells#io-channel-cellsi2c-scl-rising-time-nsi2c-scl-falling-time-nsrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-on-in-suspendregulator-suspend-microvoltregulator-off-in-suspend#reset-cellsfifo-depthbus-widthcap-mmc-highspeedno-sdno-sdionon-removablemmc-ddr-1_8vmmc-hs200-1_8vphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowinterrupt-controller#interrupt-cellsrockchip,pmugpio-controller#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enableoutput-highoutput-lowinput-enablerockchip,pinsstdout-path